`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 2024/04/21 20:46:40
// Design Name: 
// Module Name: LED_Control
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module LED_Control(
    input                  bramctrl_clk,
	input                  bramctrl_rst,
	input       [31:0]     bramctrl_val,
    output   reg           LED_system,        //by fcm    
    output   reg           LED_master,        //by fcm    
    output   reg           LED_slave,        //by fcm    
    output   reg           LED_sync
    );
reg [31:0] bramctrl_val_r;
always @(posedge bramctrl_clk or posedge bramctrl_rst) begin
    if(bramctrl_rst) begin
        bramctrl_val_r <= 32'd0;
    end
    else begin
        bramctrl_val_r <= bramctrl_val;
    end
end
reg clear;
always @(posedge bramctrl_clk or posedge bramctrl_rst) begin
    if(bramctrl_rst) begin
        clear <= 1'b0;
    end
    else if(bramctrl_val_r[31] != bramctrl_val[31]) begin
        clear <= 1'b1;
    end
    else begin
        clear <= 1'b0;
    end
end

reg [31:0] cnt;
localparam system_detect = 500000000; //10000 //100 MHz, 3s
always @(posedge bramctrl_clk or posedge bramctrl_rst) begin
    if(bramctrl_rst) begin
        LED_system <= 1'b0;
        LED_master <= 1'b0;
        LED_slave  <= 1'b0;
        LED_sync   <= 1'b0;
        cnt        <= 32'd0;
    end
    else if(bramctrl_val_r==bramctrl_val) begin //���û�б仯���Ǿͱ���֮ǰ״̬
        if(clear==1'b1) begin
            cnt        <= 32'd0;
        end
        else begin
            cnt        <= cnt + 1'b1;;
            if(cnt>=system_detect)begin
                LED_system <= 1'b0;
                LED_master <= 1'b0;
                LED_slave  <= 1'b0;
                LED_sync   <= 1'b0;
            end
            else begin
                LED_system <= LED_system;
                LED_master <= LED_master;
                LED_slave  <= LED_slave;
                LED_sync   <= LED_sync;
            end
        end
        
    end
    else begin
        LED_system  <= bramctrl_val[0];
        LED_master  <= bramctrl_val[1];
        LED_slave   <= bramctrl_val[2];
        LED_sync    <= bramctrl_val[3];
    end

end




endmodule
